时钟抖动和相位噪声测量与分析

精确度和准确度

时钟抖动工具集

相位噪声

串行数据抖动

时钟数据抖动

资源中心

Measure and Eliminate Clock Jitter in Digital Circuits

In-circuit clock signals need to be highly accurate and stable to ensure proper circuit operation. Clock jitter, phase noise and other distortions must be understood and minimized to ensure the circuit operates at its maximum potential. Common measurements made using oscilloscopes include:

Clock jitter, n-cycle jitter, accumulated jitter
Phase noise measurements, phase noise to jitter correlation
Spread spectrum clocking analysis
Low-frequency jitter and wander measurements

Watch Video

时钟抖动分析显示相位噪声分析以及时钟抖动的随机和确定性分离，显示相位噪声与抖动的比较

Watch Video ">

测量和消除数字电路中的时钟抖动

电路内时钟信号需要高度准确和稳定，以确保电路正常运行。必须了解并尽量减少时钟抖动、相位噪声和其他失真，以确保电路以其最大潜力运行。使用示波器进行的常见测量包括：

时钟抖动、n周期抖动、累积抖动
相位噪声测量、相位噪声与抖动相关性
扩频时钟分析
低频抖动和漂移测量

观看视频

Highest Precision Clock Signal Captures

12 bits resolution all-the-time ensures high precision measurements
Long capture times measure very low frequency jitter
High quality oscilloscope sample clock for low additive jitter

Improve Measurement Accuracy with Unique Noise Reduction Tools

Heterodyne signal mixing reduces noise on low slew-rate clock signals
Dual-input method provides additional noise reduction
Flexible input bandwidth filtering further optimizes SNR of clock signal

Most Versatile and Efficient Clock Jitter Measurement Toolset

Most consistent measurements
Faster and more efficient analysis
Most complete toolset

更高精度和更复杂的时钟抖动分析

Teledyne LeCroy 的 Clock Expert 软件与兼容的 Teledyne LeCroy 示波器配合使用，是用于测量时钟抖动、相位噪声和累积抖动（包括极低频 (<5 Hz) 抖动）的更精确、更先进的工具。

Highest Precision Clock Signal Captures

12 bits resolution all-the-time ensures high precision measurements
Long capture times measure very low frequency jitter
High quality oscilloscope sample clock for low additive jitter

使用一毫秒时钟信号捕获进行时钟抖动分析和相位噪声分析的屏幕截图，以实现时间抖动与相位噪声的相关性

更高精度的时钟信号捕获

始终12位分辨率确保高精度测量
长捕获时间可测量非常低的频率抖动
高品质示波器采样时钟，可实现低附加抖动

Improve Measurement Accuracy with Unique Noise Reduction Tools

Heterodyne signal mixing reduces noise on low slew-rate clock signals
Dual-input method provides additional noise reduction
Flexible input bandwidth filtering further optimizes SNR of clock signal

利用独特的降噪工具提高测量精度

外差信号混合可降低低转换速率时钟信号上的噪声
双输入方法提供额外的降噪效果
灵活的输入带宽滤波进一步优化时钟信号的SNR

Most Versatile and Efficient Clock Jitter Measurement Toolset

Most consistent measurements
Faster and more efficient analysis
Most complete toolset

更通用、更高效的时钟抖动测量工具集

更一致的测量结果
更快、更高效的分析
更完整的工具集

时钟专家概述

Jitter Separation Track:
Display jitter track of jitter separation parameter (TIE, Period, Half Period, Cycle-to-Cycle). This view of jitter quickly detects bursted jitter and modulation.
Jitter Separation Histogram:
This view of jitter quickly displays whether jitter aggressors are causing non-Gaussian distributions or long tails.
Jitter Separation Parameters:
Total jitter (Tj) can be separated into deterministic jitter (Dj) and random jitter (Rj). Dj is further decomposed into periodic and data-dependent components (Pj, DDj, ISI, DCD)
Phase Noise:
Phase noise display shows the phase noise variation/jitter in the frequency range. Supports up to 20 markers and RMS phase jitter determination.

Measurements with Track and Histogram:
Up to 12 measurement parameters can be displayed simultaneously as a track function and/or as a histogram.
Measurements Table:
Up to 12 measurements can be calculated simultaneously and displayed in a table including statistical information.
Accumulated Jitter Analysis:
The cumulative jitter (N-cycle jitter) shows the long-term jitter. The accumulated jitter can be calculated for peak and standard deviation for N up to 10000.

Accumulated Jitter Parameter:
Showing the minimum and maximum value of the accumulated jitter graphs.
Graphical User Interface:
The graphical user interface contains easy-to-understand icons and simplifies the setup.
Status Bar:
In the status bar, important information, warnings and error messages are displayed.

抖动分离轨道：
显示抖动分离参数的抖动轨迹（TIE、周期、半周期、周期到周期）。这种抖动视图可以快速检测突发抖动和调制。
抖动分离直方图：
这种抖动视图可以快速显示抖动干扰因素是否导致非高斯分布或长尾。
抖动分离参数：
总抖动 (Tj) 可分为确定性抖动 (Dj) 和随机抖动 (Rj)。 Dj 进一步分解为周期性和数据相关分量（Pj、DDj、ISI、DCD）
相位噪声：
相位噪声显示显示频率范围内的相位噪声变化/抖动。支持多达 20 个标记和 RMS 相位抖动测定。

使用轨迹和直方图进行测量：
最多可同时显示 12 个测量参数作为跟踪功能和/或直方图。
测量表：
最多可同时计算 12 个测量值并显示在包含统计信息的表格中。
累积抖动分析：
累积抖动（N周期抖动）显示了长期抖动。可以计算 N 高达 10000 的峰值和标准偏差的累积抖动。

累积抖动参数：
显示累积抖动图的最小值和最大值。
图形用户界面：
图形用户界面包含易于理解的图标并简化了设置。
状态栏：
状态栏中显示重要信息、警告和错误消息。

更高精度的时钟信号捕获

Teledyne LeCroy 示波器拥有更好的信号采集硬件和更长的采集存储器，可实现更高精度的采集和扩展的时钟抖动分析功能。

12 Bits All the Time Ensures High Precision Measurements

Only Teledyne LeCroy provides 12 bits of vertical resolution without compromises for best signal to noise ratio and lowest intrinsic jitter – achieve unmatched jitter measurement precision.

No tradeoff of resolution, sample rate, or bandwidth
Best signal-to-noise ratio for lowest intrinsic jitter
Lowest noise for unmatched jitter measurement precision

Explore More

Long Capture Times Measure Very Low Frequency Jitter

Teledyne LeCroy oscilloscopes have the industry's longest acquisition memory with capability to perform math analysis on the largest acquisitions. This provides capability to analyze the lowest frequency jitter components.

Measure wander to 5 Hz or less
Measure jitter caused by 50/60 Hz power line issues
View low frequency jitter and wander variation over time

High Quality Oscilloscope Sample Clock

Teledyne LeCroy oscilloscopes use the highest quality sample clocks to minimize additive jitter from the measurement system to the clock signal acquisition.

Ensures low additive jitter from measurement system
Sample clock jitter as low as 15 fs_RMS

Explore More

Teledyne LeCroy HD4096 技术三合一展示了高 SNR 输入放大器和高采样率的组合 12-bit ADC 和低噪声系统架构

Explore More

" data-gt-human-content="true">

始终12位确保高精度测量

只有 Teledyne LeCroy 能够提供 12 位垂直分辨率，同时不牺牲更佳信噪比和更低固有抖动 — 实现强大的抖动测量精度。

强大的分辨率、采样率或带宽
更佳信噪比，实现更低的固有抖动
更低噪声，实现强大的抖动测量精度

了解更多信息

时钟抖动测量显示低频抖动（漂移）至 5 Hz，并通过相位噪声分析了解相位噪声与抖动的相关性

长捕获时间测量极低频抖动

Teledyne LeCroy 示波器拥有业界更长的采集内存，能够对更大的采集数据执行数学分析。这提供了分析更低频率抖动分量的能力。

测量漂移至 5 Hz 或更小
测量由以下原因引起的抖动 50/60 Hz 电源线问题
查看低频抖动和漂移随时间的变化

Explore More

高品质示波器采样时钟

Teledyne LeCroy 示波器使用最高质量的采样时钟来最大限度地减少从测量系统到时钟信号采集的附加抖动。

确保测量系统的附加抖动较低
采样时钟抖动低至 15 fs_有效值

了解更多信息

独特的降噪工具进一步提高测量精度

通过使用 Clock Expert 中提供的独特的降噪、测量和滤波工具，进一步提高测量精度

外差信号混合可降低低转换速率时钟信号上的噪声
双输入方法提供额外的降噪效果
灵活的输入带宽滤波进一步优化时钟信号的SNR

更通用、更高效的时钟抖动
测量工具集

Clock Expert 分析架构以更快、更有效的方式提供更一致的测量。 Clock Expert 还包含更完整的时钟抖动测量工具集。

Most Consistent Clock Jitter Measurements

Use Teledyne LeCroy's long oscilloscope memory to take one long clock signal acquisition and make all clock jitter measurements and phase noise analysis on the same set of data, using a single, consistent setup.

All measurements are made with one clock signal acquisition
Global settings are uniformly applied to ensure setup consistency
Ultra-long memory permits simultaneous measurement of low and high-frequency jitter

Faster and More Efficient Clock Jitter Analysis

Save time and use one software option that includes all the clock jitter and phase noise measurement tools you need, and perform all analyses with an easy-to-use graphical user interface.

One software option has all the required measurement tools
Simplified user setup – no confusing wizards
No need for multiple acquisitions

Most Complete Clock Jitter Measurement Toolset

Get more insight and analyze jitter in any domain. View all the measurements and analysis views simultaneously in one software option.

Complete jitter domain analysis - time, frequency (spectral and phase noise) and statistical
Many different simultaneous jitter measurements and views

更一致的时钟抖动测量

使用 Teledyne LeCroy 的长示波器存储器进行一次长时钟信号采集，并使用单一一致的设置对同一组数据进行所有时钟抖动测量和相位噪声分析。

所有测量均通过一次时钟信号采集完成
统一应用全局设置以确保设置的一致性
超长内存允许同时测量低频和高频抖动

更快、更高效的时钟抖动分析

节省时间并使用一个软件选项，其中包括您需要的所有时钟抖动和相位噪声测量工具，并通过易于使用的图形用户界面执行所有分析。

一种软件选项包含所有必需的测量工具
简化的用户设置 – 没有令人困惑的向导
无需多次收购

时钟信号的屏幕截图，同时进行多个抖动测量、相位噪声分析、抖动分离、统计分布和频谱分析。

更完整的时钟抖动测量工具集

获得更多洞察并分析任何领域的抖动。在一个软件选项中同时查看所有测量和分析视图。

完整的抖动域分析 - 时间、频率（频谱和相位噪声）和统计
许多不同的同步抖动测量和视图

更完整的时钟抖动和相位噪声测量工具集

获得更多洞察并分析任何领域的抖动。在一个软件选项中同时查看所有测量和分析视图。

Measurements

Rj and Dj separation

Phase Noise

Accumulated Jitter

SSC Analysis

View all the jitter measurements at one time with the corresponding jitter vs. time (Track) and statistical (Histogram) views in one easy-to-use setup.

Configurable measurement table display
12 simultaneous clock jitter measurements with simultaneous Track and Histogram views
Easy-to-use setup

Get the most complete determination of total jitter and Rj+Dj jitter separation for time interval error (TIE) jitter and many more clock jitter measurements

TIE, Half-Period, Period, Cycle-to-Cycle and N-Cycle jitter separation
Jitter results as time domain (Track), Jitter FFT, Histogram or Bathtub curve

Expand jitter view to frequency domain using Phase Noise Analysis

Ultra long memory support for lowest phase noise frequency
RMS phase noise jitter calculation
Multi-cursor and table view

Explore More

Gain more insight about jitter over long periods of time with Accumulated (N-cycle) Jitter Analysis

Fast calculation
Unmatched graphical representation
Table display of all essential measurements

Validate your EMC requirements with Spread Spectrum Clock (SSC) Modulation Analysis.

Specialized measurements for SSC analysis
Quick and easy verification that SSC modulation is within design specifications

测量

Rj 和 Dj 分离

相位噪声

累积抖动

SSC分析

通过一种易于使用的设置，通过相应的抖动与时间（轨迹）和统计（直方图）视图一次性查看所有抖动测量结果。

可配置的测量表显示
12 个同步时钟抖动测量，同时具有轨迹和直方图视图
易于使用的设置

获得更完整的总抖动确定以及时间间隔误差 (TIE) 抖动和更多时钟抖动测量的 Rj+Dj 抖动分离

TIE、半周期、周期、周期间和 N 周期抖动分离
时域（轨迹）、抖动 FFT、直方图或浴盆曲线形式的抖动结果

使用相位噪声分析将抖动视图扩展到频域

超长内存支持最低相位噪声频率
RMS相位噪声抖动计算
多光标和表格视图

了解更多信息

通过累积（N 周期）抖动分析，更深入地了解长时间内的抖动

快速计算
强大的图形表示
所有基本测量的表格显示

通过扩频时钟 (SSC) 调制分析验证您的 EMC 要求。

SSC 分析的专业测量
快速轻松地验证 SSC 调制是否符合设计规范

使用示波器测量相位噪声和时间抖动

示波器可以提供相位噪声测量并将相位噪声与时钟抖动测量相关联。相位噪声测量的精度和范围取决于示波器采样时钟抖动、噪声性能和采集存储器长度。

How is Jitter and Phase Noise Measured?

The short-term stability of an oscillator is characterized by measuring the jitter in the time domain and the phase noise in the frequency domain. Both measurements describe the same underlying phenomena. Therefore, it is possible to correlate phase noise to jitter.

A phase noise analyzer only measures in the frequency domain whereas an oscilloscope measures in the time domain but can mathematically convert this data to the frequency domain. Therefore, an oscilloscope is ideal for measuring both jitter and phase noise. However, the oscilloscope must have high performance to meet the measurement needs of modern oscillators.

The measurement of phase noise with an oscilloscope is based on the measurement of the TIE (Time Interval Error). The TIE measurement is a time (or unit interval) difference between the time at which an input signal exceeds a preset voltage threshold and the ideal time location of a user-specified reference frequency. TIE measurements are usually plotted in time units as a function equal to a set of measurements over a period of time, which is a graphical display of the phase modulation envelope of the oscillator. This can be mathematically converted by the oscilloscope to a frequency-domain plot of phase noise vs. frequency.

Watch Webinar

Calculating Time Jitter from Phase Noise

Once a plot of phase noise vs. frequency is generated, the equivalent RMS value of the TIE jitter can be calculated from the integrated phase noise power over the frequency range of interest. Cursors are used to define the frequency range on the phase noise plot, and jitter and phase noise values are displayed in a table.

High Performance Oscilloscopes and Noise Reduction Tools Improve Phase Noise Calculation Accuracy

Teledyne LeCroy's 12-bit oscilloscopes combine low noise (high signal-to-noise ratio performance) with extremely low internal sample clock jitter. This results in a very low jitter noise floor. However, jitter (and phase noise) performance can be enhanced further with the heterodyne function, filters and the dual input method.

Heterodyne Function: The heterodyne function uses a software approach based on the operation of a phase noise analyzer and is ideal for signals with a low slope.
Input Filter: High-frequency noise and unwanted effects from the measurement setup can have a negative influence on the measurements. These effects can be reduced by using suitable low-pass, high-pass or band-pass filters to reduce extraneous noise.
Dual Input Method: This method splits the measurement signal externally via a splitter to acquire it simultaneously through two input channels in the oscilloscope. The noise in the two input channels is not coherent, and therefore the signal-to-noise ratio is increased.

Heterodyne Function in Clock Expert Performs a Similar Function to a Phase Noise Analyzer

A typical phase noise measurement with a spectrum analyzer or phase noise analyzer is shown in the figure on the left. The output signal of the oscillator under test is mixed with the output signal of a reference oscillator with low phase noise, which is set to the same frequency and a relative phase of 90°. The phase shift is set to exact phase quadrature, which is indicated by a minimum DC level at the output of the mixer. The mixer now works as a phase detector and generates a voltage that is proportional to the phase difference between the two sources. The reference oscillator has a very low phase noise and the output of the mixer is essentially a function of the phase noise of the oscillator under test. The output signal of the mixer is low-pass filtered to remove the higher-frequency sum terms and the spectral components of the mixer leakage.

The heterodyne function in Clock Expert works on the same principle, using a software approach, with the reference oscillator generated internally in software and assumed to be ideal.

Low-frequency Phase Noise Analysis Using Oscilloscope Long Acquisition Memory

The phase noise measurement in an oscilloscope uses a fast-fourier transform (FFT) to convert time-domain data to the frequency domain. The lowest frequency that can be calculated with an FFT is the inverse of the acquisition period, and the acquisition period (at a given sample rate) is defined by the oscilloscope acquisition memory length with more memory equating to a lower measured frequency.

For example, to be able to measure phase noise at a frequency of 20 Hz, the acquisition period must be 50 milliseconds (1/.050 seconds = 20 Hz). 50 milliseconds captured with a sampling rate of 10 GS/s requires 500 million points (Mpts) of oscilloscope acquisition memory (.050 s * 10e9 S/s = 500e6 S, or points).

Watch Webinar

如何测量抖动和相位噪声？

振荡器的短期稳定性通过测量时域中的抖动和频域中的相位噪声来表征。两种测量都描述了相同的基本现象。因此，可以将相位噪声与抖动相关联。

相位噪声分析仪仅在频域中进行测量，而示波器在时域中进行测量，但可以通过数学方式将该数据转换到频域。因此，示波器非常适合测量抖动和相位噪声。然而，示波器必须具有高性能才能满足现代振荡器的测量需求。

使用示波器测量相位噪声是基于 TIE（时间间隔误差）的测量。 TIE测量是输入信号超过预设电压阈值的时间与用户指定的参考频率的理想时间位置之间的时间（或单位间隔）差。 TIE 测量通常以时间单位绘制为等于一段时间内的一组测量值的函数，这是振荡器相位调制包络的图形显示。这可以通过示波器以数学方式转换为相位噪声与频率的频域图。

Watch Webinar

根据相位噪声计算时间抖动

一旦生成相位噪声与频率的关系图，就可以根据感兴趣的频率范围内的积分相位噪声功率来计算 TIE 抖动的等效 RMS 值。光标用于定义相位噪声图上的频率范围，抖动和相位噪声值显示在表格中。

高性能示波器和降噪工具提高相位噪声计算精度

Teledyne LeCroy 的 12-bit 示波器将低噪声（高信噪比性能）与极低的内部采样时钟抖动结合在一起。这导致非常低的抖动本底噪声。然而，抖动（和相位噪声）性能可以通过外差功能、滤波器和双输入方法进一步增强。

外差功能：外差功能使用基于相位噪声分析仪操作的软件方法，非常适合低斜率信号。
输入滤波器：测量设置中的高频噪声和不良影响可能会对测量产生负面影响。通过使用合适的低通、高通或带通滤波器来减少外来噪声，可以减少这些影响。
双输入法：该方法通过分离器将测量信号从外部分离出来，通过示波器的两个输入通道同时采集。两个输入通道中的噪声不相干，因此信噪比增加。

Clock Expert 中的外差功能执行与相位噪声分析仪类似的功能

左图显示了使用频谱分析仪或相位噪声分析仪进行的典型相位噪声测量。被测振荡器的输出信号与低相位噪声的参考振荡器的输出信号混合，设置为相同的频率和90°的相对相位。相移被设置为精确的相位正交，这由混频器输出处的最小直流电平指示。混频器现在用作相位检测器，并生成与两个源之间的相位差成比例的电压。参考振荡器具有非常低的相位噪声，并且混频器的输出本质上是被测振荡器的相位噪声的函数。混频器的输出信号经过低通滤波，以去除高频和项以及混频器泄漏的频谱分量。

Clock Expert 中的外差功能的工作原理相同，使用软件方法，并在软件内部生成参考振荡器，并假定其是理想的。

使用示波器长采集存储器进行低频相位噪声分析

示波器中的相位噪声测量使用快速傅立叶变换 (FFT) 将时域数据转换为频域。使用 FFT 计算的最低频率是采集周期的倒数，采集周期（在给定采样率下）由示波器采集存储器长度定义，存储器越大，测量频率越低。

例如，为了能够测量频率为 20 Hz 的相位噪声，采集周期必须为 50 毫秒（1/.050 秒 = 20 Hz）。以 50 GS/s 采样率捕获 10 毫秒需要 500 亿个点（Mpts）的示波器采集内存（050 s * 10e9 S/s = 500e6 S 或点）。

Explore More ">

更完整的串行数据分析工具箱

Teledyne LeCroy 的 SDA Expert 串行数据分析选项提供了任何高速串行数据 NRZ 或 PAM 眼图、抖动或噪声测量所需的所有工具。

更完整的串行数据分析工具箱
复杂测量的最高置信度
针对 PCI Express、USB 和 Thunderbolt、 DisplayPort 等

了解更多信息

SDA Expert 串行数据分析 NRZ 眼图、抖动直方图、抖动轨迹、抖动 FFT 以及随机、确定性和总抖动测量

Basic Toolbox for Clock and Clock-Data jitter

JitKit is a basic, easy-to-use jitter analysis tool that meets the requirements for fast analysis of clock and clock-to-data jitter. It is specifically designed for the needs of embedded system designers.

Fast and easy validation
Direct display of jitter values
Four views of jitter speeds debug and analysis

Explore More

Explore More ">

时钟和时钟数据抖动的基本工具箱

JitKit是一款基本的、易于使用的抖动分析工具，满足快速分析时钟和时钟到数据抖动的要求。它专为满足嵌入式系统设计人员的需求而设计。

快速简单的验证
直接显示抖动值
抖动的四个视图加速调试和分析

了解更多信息

资源中心

Technical Docs

Webinars

Videos

Name
Clock Expert Datasheet	Datasheet
Clock Expert Software Instruction Manual	Product Manual
The difference between Edge-to-Reference and Edge-to Edge “JITTER” analysis Technical Brief	Read App Note

Clock Expert Overview – Measuring Phase Noise and Clock Jitter

Jitter University Webinar Series

Confused about jitter? Did someone’s explanation of jitter create more questions than answers? If so, join Teledyne LeCroy as we teach everything about jitter – what jitter is, different categories, instruments used, measurements and views, deconvolution and extrapolation, and more.

Introduction to Jitter

In Part 1 of our Jitter University Webinar Series we provide basic jitter definitions and categories, describe the types of instruments historically and currently used to measure jitter, and jitter measurement instrument strengths and weaknesses.

Learning About Jitter on the Edge

In Part 2 of our Jitter University Webinar Series we illustrate examples of measuring jitter using acquisitions comprised of one or two edges.

Taking the Long View of Jitter

In Part 3 of our Jitter University Webinar Series we leverage the use of modern digital oscilloscopes to make more jitter measurements faster and more accurately.

Practical Jitter Debug and Measurement Examples

In Part 4 of our Jitter University Webinar Series we introduce spectral analysis of jitter as a debug tool and provide other practical examples of using statistical and time domain analysis tools in the oscilloscope to uncover the root cause of jitter problems.

Fundamentals of Serial Data Jitter Measurements

In Part 5 of our Jitter University Webinar Series we focus on the details of the time interval error (TIE) measurement that is the foundation for extrapolated jitter calculations on non-return to zero (NRZ) serial data signals. We describe a typical serial data link, and provide foundational knowledge about the impact that link has on jitter measurement and extrapolation methodologies.

Serial Data Jitter Separation, Extrapolation, and Jitter Views

In Part 6 of our Jitter University Webinar Series we describe what total jitter at a given bit error rate (Tj@BER) is and how it is derived from time interval error (TIE) measurements using extrapolation models. Random jitter (Rj) and deterministic (Dj) separation is explained, with further explanation of Dj separation into data dependent jitter (DDj), duty cycle distortion (DCD), intersymbol interference (ISI), bounded uncorrelated jitter (BUj) and periodic jitter (Pj), with examples provided.

Advanced Course on Serial Data Jitter Measurements

In Part 7 of our Jitter University Webinar Series we dive deeper into the various measured and extrapolated jitter views, explain statistical and time-varying views of jitter in serial data link margins as viewed with an eye diagram.

How to Measure Jitter Induced by PDN Noise

Join Professor Eric Bogatin as he discusses and demonstrates how to measure in-circuit jitter caused by PDN power integrity noise and other abnormalities.

The Impact of Power Rail Noise on Clock Jitter

In this webinar Eric Bogatin demonstrates how to measure the jitter in both clocks and data and identify the contribution from noise on the power rail.

How Do I Measure Jitter With an Oscilloscope?

In Part 12 of our 2024 Oscilloscope Coffee Break Webinar Series we explore what is jitter and the various jitter types and measurement techniques, including statistical analysis, time-domain behavior, and extrapolation for serial data.

技术文档

网络研讨会

视频

Datasheet ">

姓名
Clock Expert Software Instruction Manual	Product Manual
The difference between Edge-to-Reference and Edge-to Edge “JITTER” analysis Technical Brief	Read App Note
时钟专家数据表	产品规格书
时钟专家软件使用说明书	使用指导手册
边到参考和边到边“抖动”分析之间的区别技术简介	阅读应用笔记

Clock Expert 概述 – 测量相位噪声和时钟抖动

Jitter 大学网络研讨会系列

对抖动感到困惑吗？有人对抖动的解释是否产生了比答案更多的问题？如果是这样，请加入 Teledyne LeCroy，我们将教授有关抖动的所有知识 - 什么是抖动、不同类别、使用的仪器、测量和视图、反卷积和外推等等。

全部注册

抖动简介

在我们的抖动大学网络研讨会系列的第 1 部分中，我们提供了基本的抖动定义和类别，描述了历史上和当前用于测量抖动的仪器类型，以及抖动测量仪器的优缺点。

了解边缘抖动

在我们的抖动大学网络研讨会系列的第 2 部分中，我们举例说明了使用由一个或两个边缘组成的采集来测量抖动的示例。

从长远来看抖动

在我们的抖动大学网络研讨会系列的第 3 部分中，我们利用现代数字示波器来更快、更准确地进行更多抖动测量。

实用抖动调试和测量示例

在我们的抖动大学网络研讨会系列的第 4 部分中，我们介绍了作为调试工具的抖动频谱分析，并提供了在示波器中使用统计和时域分析工具来发现抖动问题根本原因的其他实际示例。

串行数据抖动测量的基础

在我们的抖动大学网络研讨会系列的第 5 部分中，我们将重点介绍时间间隔误差 (TIE) 测量的细节，这是对不归零 (NRZ) 串行数据信号进行外推抖动计算的基础。我们描述了一个典型的串行数据链路，并提供了有关该链路对抖动测量和外推方法的影响的基础知识。

串行数据抖动分离、外推和抖动视图

在抖动大学网络研讨会系列的第 6 部分中，我们描述了给定误码率 (Tj@BER) 下的总抖动是多少，以及如何使用外推模型从时间间隔误差 (TIE) 测量中得出它。解释了随机抖动 (Rj) 和确定性 (Dj) 分离，进一步解释了 Dj 分离为数据相关抖动 (DDj)、占空比失真 (DCD)、符号间干扰 (ISI)、有界不相关抖动 (BUj) 和周期性抖动(Pj)，并提供了示例。

串行数据抖动测量高级课程

在我们的抖动大学网络研讨会系列的第 7 部分中，我们深入探讨了各种测量和推断的抖动视图，解释了用眼图查看的串行数据链路余量中抖动的统计和时变视图。

如何测量 PDN 噪声引起的抖动

与 Eric Bogatin 教授一起讨论和演示如何测量由 PDN 电源完整性噪声和其他异常引起的电路内抖动。

即刻注册

电源轨噪声对时钟抖动的影响

在本次网络研讨会中，Eric Bogatin 演示了如何测量时钟和数据中的抖动，并确定电源轨上噪声的影响。

即刻注册

如何用示波器测量抖动？

在 12 年示波器咖啡休息网络研讨会系列的第 2024 部分中，我们将探讨什么是抖动以及各种抖动类型和测量技术，包括统计分析、时域行为和串行数据的外推。

即刻注册

需要帮助或信息？

我们随时为您提供帮助，解答您的任何问题。我们期待您的回复

订阅活动快讯

联系我们

索取方案演示